just refactoring

This commit is contained in:
erpalma
2018-08-13 14:27:47 -07:00
parent d6f8d995cd
commit 063bc0c5aa

View File

@@ -39,16 +39,16 @@ power = {'source': None, 'method': 'polling'}
def writemsr(msr, val): def writemsr(msr, val):
n = ['/dev/cpu/{:d}/msr'.format(x) for x in range(cpu_count())] msr_list = ['/dev/cpu/{:d}/msr'.format(x) for x in range(cpu_count())]
if not os.path.exists(n[0]): if not os.path.exists(msr_list[0]):
try: try:
subprocess.check_call(('modprobe', 'msr')) subprocess.check_call(('modprobe', 'msr'))
except subprocess.CalledProcessError: except subprocess.CalledProcessError:
print('[E] Unable to load the msr module.') print('[E] Unable to load the msr module.')
sys.exit(1) sys.exit(1)
try: try:
for c in n: for addr in msr_list:
f = os.open(c, os.O_WRONLY) f = os.open(addr, os.O_WRONLY)
os.lseek(f, msr, os.SEEK_SET) os.lseek(f, msr, os.SEEK_SET)
os.write(f, struct.pack('Q', val)) os.write(f, struct.pack('Q', val))
os.close(f) os.close(f)
@@ -59,21 +59,22 @@ def writemsr(msr, val):
else: else:
raise e raise e
# returns the value between from_bit and to_bit as unsigned long # returns the value between from_bit and to_bit as unsigned long
def readmsr(msr, from_bit=0, to_bit=63): def readmsr(msr, from_bit=0, to_bit=63):
if from_bit > to_bit: if from_bit > to_bit:
print('wrong readmsr bit params') print('[E] Wrong readmsr bit params')
sys.exit(1) sys.exit(1)
n = ['/dev/cpu/{:d}/msr'.format(x) for x in range(cpu_count())] msr_list = ['/dev/cpu/{:d}/msr'.format(x) for x in range(cpu_count())]
if not os.path.exists(n[0]): if not os.path.exists(msr_list[0]):
try: try:
subprocess.check_call(('modprobe', 'msr')) subprocess.check_call(('modprobe', 'msr'))
except subprocess.CalledProcessError: except subprocess.CalledProcessError:
print('[E] Unable to load the msr module.') print('[E] Unable to load the msr module.')
sys.exit(1) sys.exit(1)
try: try:
for c in n: for addr in msr_list:
f = os.open(c, os.O_RDONLY) f = os.open(addr, os.O_RDONLY)
os.lseek(f, msr, os.SEEK_SET) os.lseek(f, msr, os.SEEK_SET)
val = struct.unpack('Q', os.read(f, 8))[0] val = struct.unpack('Q', os.read(f, 8))[0]
os.close(f) os.close(f)
@@ -93,7 +94,7 @@ def is_on_battery():
def calc_time_window_vars(t): def calc_time_window_vars(t):
# 0.000977 is the time unit of this CPU # 0.000977 is the time unit of my CPU
time_unit = 1.0 / 2**readmsr(0x606, 16, 19) time_unit = 1.0 / 2**readmsr(0x606, 16, 19)
for Y in range(2**5): for Y in range(2**5):
for Z in range(2**2): for Z in range(2**2):
@@ -155,7 +156,7 @@ def calc_reg_values(config):
trip_offset = int(round(100 - config.getfloat(power_source, 'Trip_Temp_C'))) trip_offset = int(round(100 - config.getfloat(power_source, 'Trip_Temp_C')))
regs[power_source]['MSR_TEMPERATURE_TARGET'] = trip_offset << 24 regs[power_source]['MSR_TEMPERATURE_TARGET'] = trip_offset << 24
# 0.125 is the power unit of this CPU # 0.125 is the power unit of my CPU
power_unit = 1.0 / 2**readmsr(0x606, 0, 3) power_unit = 1.0 / 2**readmsr(0x606, 0, 3)
PL1 = int(round(config.getfloat(power_source, 'PL1_Tdp_W') / power_unit)) PL1 = int(round(config.getfloat(power_source, 'PL1_Tdp_W') / power_unit))
Y, Z = calc_time_window_vars(config.getfloat(power_source, 'PL1_Duration_s')) Y, Z = calc_time_window_vars(config.getfloat(power_source, 'PL1_Duration_s'))
@@ -196,7 +197,7 @@ def power_thread(config, regs, exit_event):
sys.exit(1) sys.exit(1)
while not exit_event.is_set(): while not exit_event.is_set():
# # switch back to sysfs polling
if power['method'] == 'polling': if power['method'] == 'polling':
power['source'] = 'BATTERY' if is_on_battery() else 'AC' power['source'] = 'BATTERY' if is_on_battery() else 'AC'